Data Sheet

ADPL42005

analog.com

Rev. 0

17 of 26

APPLICATIONS INFORMATION

Design Tools

The ADPL42005 is supported by the LTpowerCAD® and LTspice® design tools to produce complete power designs

and simulations. For more information on design tools, visit the ADPL42005 product page.

Capacitor Selection

Output Capacitor

The ADPL42005 is designed for operation with small, space-saving ceramic capacitors but functions with most

commonly used capacitors as long as care is taken with regard to the effective series resistance (ESR) value. The ESR

of the output capacitor affects the stability of the LDO control loop. A minimum of 1µF capacitance with an ESR of

1Ω or less is recommended to ensure the stability of the ADPL42005. Transient response to changes in load current

is also affected by output capacitance. Using a larger value of output capacitance improves the transient response

of the ADPL42005 to large changes in load current. Figure 42 shows the transient responses for an output capacitance

value of 1µF.

Figure 42. Output Transient Response, VOUT = 1.8V, COUT = 1µF

Input Bypass Capacitor

Connecting a 1µF capacitor from VIN to GND reduces the circuit sensitivity to the printed circuit board (PCB) layout,

especially when long input traces or high source impedance are encountered. If greater than 1µF of output

capacitance is required, the input capacitor should be increased to match it.

Programmable Undervoltage Lockout(UVLO)

The ADPL42005 uses the EN/UVLO pin to enable and disable the VOUT pin under normal operating conditions. As

shown in Figure 43, when a rising voltage on EN crosses the upper threshold, VOUT turns on. When a falling voltage on

EN/UVLO crosses the lower threshold, VOUT turns off. The hysteresis of the EN/UVLO threshold is determined by the

Thevenin equivalent resistance in series with the EN/UVLO pin.

CH2 50mV

CH1 500mA

M 20µs

A CH1

270mA

1

2

T 10%

Ω

LOAD CURRENT

OUTPUT VOLTAGE