Data Sheet

ADPL42005

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Rev. 0

19 of 26

Figure 45. Typical Startup Behavior

Power-Good Feature

The ADPL42005 provides a power-good pin (PG) to indicate the status of the output. This open-drain output requires

an external pull-up resistor to VIN or VOUT. If the part is in shutdown mode, current-limit mode, or thermal shutdown,

or if it falls below 90% of the nominal output voltage, the power-good pin (PG) immediately transitions low. During

soft-start, the rising threshold of the powergood signal is 93.5% of the nominal output voltage.

The open-drain output is held low when the ADPL42005 has sufficient input voltage to turn on the internal PG

transistor. The PG transistor is terminated through a pull-up resistor to VOUT or VIN.

Power-good accuracy is 93.5% of the nominal regulator output voltage when this voltage is rising, with a 90% trip

point when this voltage is falling. Regulator input voltage brownouts or glitches trigger power no good signals if VOUT

falls below 90%.

A normal power-down causes the power-good signal to go low when VOUT drops below 90%.

Figure 46 and Figure 47 show the typical power-good rising and falling threshold over temperature.

Figure 46. Typical Power-Good Threshold vs. Temperature, VOUT Rising

TIME (µs)

0

500

1000

1500

2000

5V

3.3V

ENABLE

0

1

2

3

4

5

6

4.2

4.3

4.4

4.5

4.6

4.7

4.8

4.9

5.0

VOUT (V)

PG –40°C

PG –5°C

PG +25°C

PG +85°C

PG +125°C