IRGPF30F datasheet(25/35 Pages) IRF

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HIGH TEMPERATURE GATE BIAS (HTGB)

Test circuit

Conditions

DUT

Bias:

Vge = As required

Temperature:

Tmax

Duration:

2000 Hours nominal

Test points:

168, 500, 1000,

1500, 2000 Hours nominal.

BIAS

D = Diode for CoPack devices only

Purpose

Failure Modes

Sensitive Parameters

ICES,VGE(th)

The purpose of High Temperature Gate Bias is to stress the devices with the

applied bias to the gate while at elevated junction temperature to accelerate time

dependent dielectric breakdown of the gate structure.

The primary failure modes for long term gate stress is a rupture of the gate oxide,

causing either a resistive short between gate-to-emitter or gate-to-collector or what

appears to be a low breakdown diode between the gate and source.

The oxide breakdown has been attributed to the degradation in time of existing

defects in the thermally grown oxide. These defects can take form of localized

thickness variations,

structural

anomalies or the presence of

sub-micron

particulate, within the oxide.

As with HTRB, extreme care must be exercised in the course of a long term test to

avoid potential hazards such as electrostatic discharge or electrical overstress to

the gate during test. Failures arising from this abuse are virtually indistinguishable

from true oxide breakdown which result from the actual stress test.

IGBT / CoPack

Quarterly Reliability Report

Page 25 of 35

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