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ADL6331ACCZA-R7 数据表(PDF) 42 Page - Analog Devices

部件名 ADL6331ACCZA-R7
功能描述  0.38 GHz to 15 GHz TxVGA
PDF  54 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL6331ACCZA-R7 数据表(HTML) 42 Page - Analog Devices

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Data Sheet
ADL6331
REGISTER DETAILS
analog.com
Rev. B | 42 of 54
Table 30. Bit Descriptions for SPARE_0013
Bits
Bit Name
Description
Reset
Access
[7:0]
SPARE_0013
Spare 0013.
0x0
R
Address: 0x100, Reset: 0x11, Name: SIG_PATH0_0
Table 31. Bit Descriptions for SIG_PATH0_0
Bits
Bit Name
Description
Reset
Access
[7:5]
RESERVED
Reserved.
0x0
R
4
AMUX_BG_EN
AMUX Bandgap Enable.
0x1
R/W
0: Disable AMUX Bandgap.
1: Enable AMUX Bandgap.
[3:1]
RESERVED
Reserved.
0x0
R/W
0
LDO18_EN
1.8V LDO Enable for AMUX Block.
0x1
R/W
0: Disable.
1: Enable.
Address: 0x101, Reset: 0x00, Name: SIG_PATH1_0
Table 32. Bit Descriptions for SIG_PATH1_0
Bits
Bit Name
Description
Reset
Access
[7:3]
RESERVED
Reserved.
0x0
R
2
AMP2_EN
Enable Amp 2.
0x0
R/W
0: Disable.
1: Enable.
1
DSA_EN
DSA Enable.
0x0
R/W
0: Disable.
1: Enable.
0
AMP1_EN
Enable Amp 1.
0x0
R/W
0: Disable.
1: Enable.
Address: 0x102, Reset: 0x00, Name: SIG_PATH2_0



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