Data Sheet

ADL6331

0.38 GHz to 15 GHz TxVGA

Rev. B

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FEATURES

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Broadband TxVGA interfacing RF-DAC to beamformer and PA

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Operating frequency range: 0.38 GHz to 15 GHz, two product

variants

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ADL6331-A: 0.38 GHz to 8.0 GHz

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ADL6331-B: 1.0 GHz to 15.0 GHz

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Optimizes common-mode rejection of RF-DAC, even-order har-

monics, and intermodulation

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50 Ω differential inputs and 50 Ω single-ended output

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Integrated broadband RF output balun

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70 dB of gain control range in 1.0 dB step

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RF DSA range: 24.0 dB with 1.0 dB step

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Amplifier bypass loss of 12 dB each

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Asynchronous toggle between multiple predefined attenuation

values and bypass amplifier stages

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Power gain at 4 GHz: 15.5 dB (ADL6331-A), 15.8 dB (ADL6331-

B)

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Noise figure at 4 GHz: 7.5 dB (ADL6331-A), 8.1 dB (ADL6331-B)

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OIP3 at 4 GHz: 32.8 dBm (ADL6331-A), 31.8 dBm (ADL6331-B)

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OIP2 at 4 GHz: 59.7 dBm (ADL6331-A), 56.2 dBm (ADL6331-B)

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OP1dB at 4 GHz: 12.2 dBm (ADL6331-A), 12.3 dBm (ADL6331-

B)

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Fully programmable through a 3- or 4-wire SPI

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Single 3.3 V supply

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24-terminal, 4.0 mm × 4.0 mm land grid array (LGA)

APPLICATIONS

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Aerospace and defense

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Instrumentation and test equipment

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Communication systems

GENERAL DESCRIPTION

The ADL6331 transmit variable gain amplifier (TxVGA) provides

an interface from RF digital-to-analog converters (RF DACs) to a

singled-ended power amplifier (PA) signal chain. Each ADL6331 IC

is composed of a balun, two differential RF amplifiers with bypass

attenuators, and a digital step attenuator (DSA) to provide suitable

transmitter performance in a 24-terminal, 4.0 mm x 4.0 mm LGA

package.

Serial-port interface (SPI) control is available to configure RF signal

paths or to optimize supply current vs. performance.

An integrated RF balun is used to provide a single-ended output

over 0.38 GHz to 8.0 GHz (ADL6331-A) or 1.0 GHz to 15.0 GHz

(ADL6331-B) with good impedance match.

Table 1. ADL6331 Frequency Ranges

ADL6331 Variant

Frequency Range (GHz)

A

0.38 to 8.0

B

1.0 to 15.0

FUNCTIONAL BLOCK DIAGRAM

Figure 1. Functional Block Diagram