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PIC16LF18323-E/P 数据表(PDF) 54 Page - Microchip Technology |
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PIC16LF18323-E/P 数据表(HTML) 54 Page - Microchip Technology |
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54 / 442 page ![]() PIC16(L)F18313/18323 DS40001799A-page 54 Preliminary 2015 Microchip Technology Inc. 4.3 Code Protection Code protection allows the device to be protected from unauthorized access. Program memory protection and data memory are controlled independently. Internal access to the program memory is unaffected by any code protection setting. 4.3.1 PROGRAM MEMORY PROTECTION The entire program memory space is protected from external reads and writes by the CP bit in Configuration Words. When CP = 0, external reads and writes of program memory are inhibited and a read will return all ‘0’s. The CPU can continue to read program memory, regardless of the protection bit settings. Self-writing the program memory is dependent upon the write protection setting. See Section 4.4 “Write Protection” for more information. 4.3.2 DATA MEMORY PROTECTION The entire data EEPROM is protected from external reads and writes by the CPD bit in the Configuration Words. When CPD = 0, external reads and writes of EEPROM memory are inhibited and a read will return all ‘0’s. The CPU can continue to read and write EEPROM memory, regardless of the protection bit settings. 4.4 Write Protection Write protection allows the device to be protected from unintended self-writes. Applications, such as boot loader software, can be protected while allowing other regions of the program memory to be modified. The WRT<1:0> bits in Configuration Words define the size of the program memory block that is protected. 4.5 User ID Four memory locations (8000h-8003h) are designated as ID locations where the user can store checksum or other code identification numbers. These locations are readable and writable during normal execution. See Section 10.4.7, NVMREG EEPROM, User ID, Device ID and Configuration Word Access for more information on accessing these memory locations. For more information on checksum calculation, see the “PIC16(L)F183XX Memory Programming Specification” (DS40001738). |
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