PIC16LF18323-ESLASHP datasheet(102/442 Pages) MICROCHIP

102 / 442 page

PIC16(L)F18313/18323

DS40001799A-page 102

Preliminary

 2015 Microchip Technology Inc.

8.2.3

LOW-POWER SLEEP MODE

The PIC16F18313/18323 device contains an internal

Low Dropout (LDO) voltage regulator, which allows the

device I/O pins to operate at voltages up to 5.5V while

the internal device logic operates at a lower voltage.

The LDO and its associated reference circuitry must

remain active when the device is in Sleep mode.

The PIC16F18313/18323 allows the user to optimize

the operating current in Sleep, depending on the

application requirements.

Low-Power Sleep mode can be selected by setting the

VREGPM<1:0> bits of the VREGCON register.

Depending on the configuration of these bits, the LDO

and reference circuitry are placed in a low-power state

when the device is in Sleep.

8.2.3.1

Sleep Current vs. Wake-up Time

In the default operating mode, the LDO and reference

circuitry remain in the normal configuration while in

Sleep. The device is able to exit Sleep mode quickly

since all circuits remain active. In Low-Power Sleep

mode, when waking-up from Sleep, an extra delay time

is required for these circuits to return to the normal

configuration and stabilize.

The Low-Power Sleep mode is beneficial for

applications that stay in Sleep mode for long periods of

time. The Normal mode is beneficial for applications

that need to wake from Sleep quickly and frequently.

8.2.3.2

Peripheral Usage in Sleep

Some peripherals that can operate in Sleep mode will

not operate properly with the Low-Power Sleep mode

selected. The Low-Power Sleep mode is intended for

use with these peripherals:

• Brown-out Reset (BOR)

• Watchdog Timer (WDT)

• External interrupt pin/Interrupt-on-change pins

• Timer1 (with external clock source)

It is the responsibility of the end user to determine what

is acceptable for their application when setting the

VREGPM settings in order to ensure operation in

Sleep.

8.2.4

IDLE MODE

When the Idle Enable (IDLEN) bit is clear (IDLEN = 0),

the SLEEP instruction will put the device into full Sleep

mode (see Section 8.2 “Sleep Mode”). When IDLEN

is set (IDLEN = 1), the SLEEP instruction will put the

device into Idle mode. In Idle mode, the CPU and mem-

ory operations are halted, but the peripheral clocks

continue to run. This mode is similar to Doze mode,

except that in IDLE both the CPU and the program

memory are shut off.

8.2.4.1

Idle and Interrupts

IDLE mode ends when an interrupt occurs (even if GIE

= 0), but IDLEN is not changed. The device can

re-enter IDLE by executing the SLEEP instruction.

If Recover-on-Interrupt is enabled (ROI = 1), the

interrupt that brings the device out of Idle also restores

full-speed CPU execution when doze is also enabled.

8.2.4.2

Idle and WDT

When in Idle, the WDT reset is blocked and will instead

wake the device. The WDT wake-up is not an interrupt,

therefore ROI does not apply.

Note:

The PIC16LF18313/18323 does not have

a configurable Low-Power Sleep mode.

PIC16LF18313/18323 is an unregulated

device and is always in the lowest power

state when in Sleep, with no wake-up time

penalty. This device has a lower maximum

VDD

and

I/O

voltage

than

the

PIC16F18313/18323. See Section 34.0

“Electrical

Specifications”

for

information.

Note:

Peripherals using FOSC will continue

running while in Idle (but not in Sleep).

Peripherals

using

HFINTOSC,

LFINTOSC, or SOSC will continue

running in both Idle and Sleep.

Note:

If CLKOUT is enabled (CLKOUT = 0,

Configuration Word 1), the output will

continue operating while in Idle.

Note:

The WDT can bring the device out of Idle,

in the same way it brings the device out of

Sleep. The DOZEN bit is not affected.

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