PCF8563TSLASHF4 datasheet(44/45 Pages) NXP

44 / 45 page

PCF8563

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 11 — 26 October 2015

44 of 45

NXP Semiconductors

PCF8563

Real-time clock/calendar

24. Figures

Fig 1.

Block diagram of PCF8563 . . . . . . . . . . . . . . . . . .3

Fig 2.

Pin configuration for HVSON10 (PCF8563BS) . . .4

Fig 3.

Pin configuration for SO8 (PCF8563T) . . . . . . . . .4

Fig 4.

Pin configuration for TSSOP8 (PCF8563TS). . . . .4

Fig 5.

Interrupt scheme . . . . . . . . . . . . . . . . . . . . . . . . . .8

Fig 6.

Voltage-low detection. . . . . . . . . . . . . . . . . . . . . .10

Fig 7.

Data flow for the time function . . . . . . . . . . . . . . .12

Fig 8.

Access time for read/write operations . . . . . . . . .13

Fig 9.

Alarm function block diagram. . . . . . . . . . . . . . . .15

Fig 10. STOP bit functional diagram . . . . . . . . . . . . . . . .18

Fig 11. STOP bit release timing . . . . . . . . . . . . . . . . . . . .18

Fig 12. POR override sequence . . . . . . . . . . . . . . . . . . .20

Fig 13. Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Fig 14. Definition of START and STOP conditions. . . . . .21

Fig 15. System configuration . . . . . . . . . . . . . . . . . . . . . .22

Fig 16. Acknowledgement on the I2C-bus . . . . . . . . . . . .22

Fig 17. Slave address . . . . . . . . . . . . . . . . . . . . . . . . . . .23

Fig 18. Master transmits to slave receiver

(WRITE mode) . . . . . . . . . . . . . . . . . . . . . . . . . . .23

Fig 19. Master reads after setting register address (write

Fig 20. Master reads slave immediately after first byte

(READ mode) . . . . . . . . . . . . . . . . . . . . . . . . . . .24

Fig 21. Interface watchdog timer . . . . . . . . . . . . . . . . . . .25

Fig 22. Device diode protection diagram . . . . . . . . . . . . .26

Fig 23. Supply current IDD as a function of supply voltage

VDD; CLKOUT disabled . . . . . . . . . . . . . . . . . . . .29

Fig 24. Supply current IDD as a function of supply voltage

VDD; CLKOUT = 32 kHz. . . . . . . . . . . . . . . . . . . .29

Fig 25. Supply current IDD as a function of temperature

T; CLKOUT = 32 kHz . . . . . . . . . . . . . . . . . . . . . .30

Fig 26. Frequency deviation as a function of supply voltage

VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30

Fig 27. I2C-bus timing waveforms . . . . . . . . . . . . . . . . . .31

Fig 28. Application diagram . . . . . . . . . . . . . . . . . . . . . . .32

Fig 29. Package outline SOT650-1 (HVSON10) of

PCF8563BS . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33

Fig 30. Package outline SOT96-1 (SO8) of PCF8563T. .34

Fig 31. Package outline SOT505-1 (TSSOP8) of

PCF8563TS . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35

Fig 32. Temperature profiles for large and small

components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38

PCF8563T/F4 数据表(PDF) 44 Page - NXP Semiconductors

PCF8563T/F4 数据表(HTML) 44 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

数据表下载