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XCVU5P 数据表(PDF) 40 Page - Advanced Micro Devices |
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XCVU5P 数据表(HTML) 40 Page - Advanced Micro Devices |
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40 / 68 page ![]() GTY Transceiver Specifications The UltraScale Architecture and Product Data Sheet: Overview (DS890) lists the Virtex UltraScale+ FPGAs that include the GTY transceivers. GTY Transceiver DC Input and Output Levels Table 43 summarizes the DC specifications of the GTY transceivers in Virtex UltraScale+ FPGAs. Consult the UltraScale Architecture GTY Transceivers User Guide (UG578) for further details. Table 43: GTY Transceiver DC Specifications Symbol DC Parameter Conditions Min Typ Max Units DVPPIN Differential peak-to-peak input voltage (external AC coupled) >10.3125 Gb/s 150 – 1250 mV 6.6 Gb/s to 10.3125 Gb/s 150 – 1250 mV ≤ 6.6 Gb/s 150 – 2000 mV VIN Single-ended input voltage. Voltage measured at the pin referenced to GND. DC coupled VMGTAVTT = 1.2V –400 – VMGTAVTT mV VCMIN Common mode input voltage DC coupled VMGTAVTT = 1.2V – 2/3 VMGTAVTT – mV DVPPOUT Differential peak-to-peak output voltage1 Transmitter output swing is set to 11111 800 – – mV VCMOUTDC Common mode output voltage: DC coupled (equation based) When remote RX is terminated to GND VMGTAVTT/2 – DVPPOUT/4 mV When remote RX termination is floating VMGTAVTT – DVPPOUT/2 mV When remote RX is terminated to VRX_TERM2 mV VCMOUTAC Common mode output voltage: AC coupled Equation based VMGTAVTT – DVPPOUT/2 mV RIN Differential input resistance – 100 – Ω ROUT Differential output resistance – 100 – Ω TOSKEW Transmitter output pair (TXP and TXN) intra-pair skew – – 10 ps CEXT Recommended external AC coupling capacitor3 – 100 – nF Notes: 1. The output swing and pre-emphasis levels are programmable using the GTY transceiver attributes discussed in the UltraScale Architecture GTY Transceivers User Guide (UG578) and can result in values lower than reported in this table. 2. VRX_TERM is the remote RX termination voltage. 3. Other values can be used as appropriate to conform to specific protocols and standards. Figure 3: Single-Ended Peak-to-Peak Voltage 0 +V P N Single-Ended Peak-to-Peak Voltage X16653-072117 Virtex UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics DS923 (v1.10) April 26, 2019 www.xilinx.com Product Specification 40 Send Feedback |
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