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XCVU5P 数据表(PDF) 13 Page - Advanced Micro Devices

部件名 XCVU5P
功能描述  Virtex UltraScale FPGA Data Sheet: DC and AC Switching Characteristics
PDF  68 Pages
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制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

XCVU5P 数据表(HTML) 13 Page - Advanced Micro Devices

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Table 10: Differential SelectIO DC Input and Output Levels
I/O Standard
VICM (V)1
VID (V)2
VILHS3
VIHHS3
VOCM (V)4
VOD (V)5
Min
Typ
Max
Min
Typ
Max
Min
Max
Min
Typ
Max
Min
Typ
Max
SUB_LVDS
0.500 0.900 1.300 0.070
–
–
–
–
0.700 0.900 1.100
0.100
0.150
0.200
SLVS_400_18
0.070 0.200 0.330 0.140
–
0.450
–
–
–
–
–
–
–
–
MIPI_DPHY_
DCI_HS7
0.070
–
0.330 0.070
–
–
–0.040
0.460
0.150 0.200 0.250
0.140
0.200
0.270
Notes:
1.
VICM is the input common mode voltage.
2.
VID is the input differential voltage (Q – Q).
3.
VIHHS and VILHS are the single-ended input high and low voltages, respectively.
4.
VOCM is the output common mode voltage.
5.
VOD is the output differential voltage (Q – Q).
6.
LVDS is specified in Table 15.
7.
High-speed option for MIPI_DPHY_DCI. The VID maximum is aligned with the standard’s specification. A higher VID is acceptable as long
as the VIN specification is also met.
Table 11: Complementary Differential SelectIO DC Input and Output Levels for I/O Banks
I/O Standard1
VICM (V)2
VID (V)3
VOL (V)4
VOH (V)5
IOL
IOH
Min
Typ
Max
Min
Max
Max
Min
mA
mA
DIFF_HSTL_I
0.680
VCCO/2
(VCCO/2) + 0.150
0.100
–
0.400
VCCO – 0.400
5.8
–5.8
DIFF_HSTL_I_12
0.400 x VCCO
VCCO/2
0.600 x VCCO
0.100
–
0.250 x VCCO
0.750 x VCCO
4.1
–4.1
DIFF_HSTL_I_18
(VCCO/2) – 0.175
VCCO/2
(VCCO/2) + 0.175
0.100
–
0.400
VCCO – 0.400
6.2
–6.2
DIFF_HSUL_12
(VCCO/2) – 0.120
VCCO/2
(VCCO/2) + 0.120
0.100
–
20% VCCO
80% VCCO
0.1
–0.1
DIFF_SSTL12
(VCCO/2) – 0.150
VCCO/2
(VCCO/2) + 0.150
0.100
–
(VCCO/2) – 0.150
(VCCO/2) + 0.150
8.0
–8.0
DIFF_SSTL135
(VCCO/2) – 0.150
VCCO/2
(VCCO/2) + 0.150
0.100
–
(VCCO/2) – 0.150
(VCCO/2) + 0.150
9.0
–9.0
DIFF_SSTL15
(VCCO/2) – 0.175
VCCO/2
(VCCO/2) + 0.175
0.100
–
(VCCO/2) – 0.175
(VCCO/2) + 0.175
10.0 –10.0
DIFF_SSTL18_I
(VCCO/2) – 0.175
VCCO/2
(VCCO/2) + 0.175
0.100
–
(VCCO/2) – 0.470
(VCCO/2) + 0.470
7.0
–7.0
Notes:
1.
DIFF_POD10 and DIFF_POD12 HP I/O bank specifications are shown in Table 12, Table 13, Table 14.
2.
VICM is the input common mode voltage.
3.
VID is the input differential voltage.
4.
VOL is the single-ended low-output voltage.
5.
VOH is the single-ended high-output voltage.
Table 12: DC Input Levels for Differential POD10 and POD12 I/O Standards
I/O Standard1, 2
VICM (V)
VID (V)
Min
Typ
Max
Min
Max
DIFF_POD10
0.63
0.70
0.77
0.14
–
DIFF_POD12
0.76
0.84
0.92
0.16
–
Notes:
1.
Tested according to relevant specifications.
2.
Standards specified using the default I/O standard configuration. For details, see the UltraScale Architecture SelectIO Resources User Guide
(UG571).
Virtex UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics
DS923 (v1.10) April 26, 2019
www.xilinx.com
Product Specification
13
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