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TMP103CYFFR 数据表(PDF) 7 Page - Texas Instruments |
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TMP103CYFFR 数据表(HTML) 7 Page - Texas Instruments |
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7 / 30 page  Frame1Two-WireMDAWriteAddressByte Frame2PointerRegisterByte 0 StartBy Master ACKBy TMP103(1) ACKBy TMP103(1) 1 9 1 Frame3DataByte ACKBy TMP103(1) 1 D7 SDA (Continued) SCL (Continued) D6 D5 D4 D3 D2 D1 D0 9 9 SDA SCL 0 0 0 0 0 0 R/W 0 0 0 0 0 0 P1 P0 ¼ ¼ StopBy Master Frame1Two-WireSlaveAddressByte Frame2PointerRegisterByte 1 StartBy Master ACKBy TMP103 ACKBy TMP103 Frame3Two-WireSlaveAddressByte Frame4DataByteReadRegister StartBy Master ACKBy TMP103 ACKBy Master From TMP103 1 9 1 9 1 9 1 9 SDA SCL 1 1 0 R/W 0 0 0 0 0 0 P1 P0 ¼ ¼ ¼ SDA (Continued) SCL (Continued) 1 1 1 0 A2 (1) A1 (1) A0 (1) A2 (1) A1 (1) A0 (1) R/W D7 D6 D5 D4 D3 D2 D1 D0 StopBy Master StopBy Master 7 TMP103 www.ti.com SBOS545D – FEBRUARY 2011 – REVISED DECEMBER 2018 Product Folder Links: TMP103 Submit Documentation Feedback Copyright © 2011–2018, Texas Instruments Incorporated (1) The value of A0, A1, and A2 are determined by the TMP103 version; see Table 2. Figure 3. Two-Wire Timing Diagram for Read Word Format (1) All TMP103 devices on the bus acknowledge the byte. Figure 4. Two-Wire Timing Diagram MDA Write Word Format |
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