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TUSB4041IPAP 数据表(PDF) 19 Page - Texas Instruments |
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TUSB4041IPAP 数据表(HTML) 19 Page - Texas Instruments |
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19 / 48 page ![]() 19 TUSB4041I www.ti.com SLLSEK3E – JULY 2015 – REVISED SEPTEMBER 2017 Product Folder Links: TUSB4041I Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated 8.5.7 Device Configuration Register Offset = 5h Figure 8. Device Configuration Register 7 6 5 4 3 2 1 0 customStrings customSernum RSVD RSVD ganged fullPwrMgmtz RSVD RSVD RW-0 RW-0 RW-0 R-1 RW-X RW-X RW-0 R-0 Table 9. Device Configuration Register Field Descriptions Bit Field Type Reset Description 7 customStrings RW 0 Custom strings enable This bit controls the ability to write to the Manufacturer String Length, Manufacturer String, Product String Length, Product String, and Language ID registers 0 = The Manufacturer String Length, Manufacturer String, Product String Length, Product String, and Language ID registers are read only. 1 = The Manufacturer String Length, Manufacturer String, Product String Length, Product String, and Language ID registers may be loaded by EEPROM or written by SMBus. The default value of this bit is 0. 6 customSernum RW 0 Custom serial number enable This bit controls the ability to write to the serial number registers. 0 = The Serial Number String Length and Serial Number String registers are read only. 1 = Serial Number String Length and Serial Number String registers may be loaded by EEPROM or written by SMBus. The default value of this bit is 0. 5 RSVD RW 0 Reserved. 4 RSVD R 1 Reserved. This bit is reserved and returns 1 when read. 3 ganged RW X Ganged This bit is loaded at the deassertion of reset with the value of the GANGED/SMBA2/HS_UP pin. 0 = Each port is individually power switched and enabled by the PWRCTL[4:1]/BATEN[4:1] pins. 1 = The power switch control for all ports is ganged and enabled by the PWRCTL[4:1]/BATEN1 pin. When the TUSB4041I device is in I2C mode, the TUSB4041I device loads this bit from the contents of the EEPROM. When the TUSB4041I device is in SMBUS mode, the value may be overwritten by an SMBus host. 2 fullPwrMgmtz RW X Full power management This bit is loaded at the deassertion of reset with the value of the FULLPWRMGMTz/SMBA1 pin. 0 = Port power switching status reporting is enabled 1 = Port power switching status reporting is disabled When the TUSB4041I device is in I2C mode, the TUSB4041I device loads this bit from the contents of the EEPROM. When the TUSB4041I device is in SMBUS mode, the value may be overwritten by an SMBus host. 1 RSVD RW 0 Reserved This field is reserved and should not be altered from the default. 0 RSVD R 0 Reserved This field is reserved and returns 0 when read. |
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