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LP8550TLX-A/NOPB 数据表(PDF) 27 Page - Texas Instruments |
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LP8550TLX-A/NOPB 数据表(HTML) 27 Page - Texas Instruments |
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27 / 49 page ![]() LP8550 www.ti.com SNVS657E – SEPTEMBER 2010 – REVISED SEPTEMBER 2014 DEVICE CONTROL REGISTER BRT_MODE 2:1 R/W PWM source mode 00b = PWM input pin duty cycle control (default) 01b = PWM input pin duty cycle control 10b = Brightness register 11b = Direct PWM control from PWM input pin BL_CTL 0 R/W Enable backlight 0 = Backlight disabled and chip turned off if BRT_MODE[1:0] = 10. In external PWM pin control the state of the chip is defined with the PWM pin and this bit has no effect. 1 = Backlight enabled and chip turned on if BRT_MODE[1:0] = 10. In external PWM pin control the state of the chip is defined with the PWM pin and this bit has no effect. 8.6.1.3 Fault Address 02h Reset value 0000 0000b FAULT REGISTER 7 6 5 4 3 2 1 0 OPEN SHORT 2_CHANNELS 1_CHANNEL BL_FAULT OCP TSD UVLO Name Bit Access Description OPEN 7 R LED open fault detection 0 = No fault 1 = LED open fault detected. Fault pin is pulled to GND. Fault is cleared by reading the register 02h or setting EN pin low. SHORT 6 R LED short fault detection 0 = No fault 1 = LED short fault detected. Fault pin is pulled to GND. Fault is cleared by reading the register 02h or setting EN pin low. 2_CHANNELS 5 R LED fault detection 0 = No fault 1 = 2 or more channels have generated either short or open fault. Fault pin is pulled to GND. Fault is cleared by reading the register 02h or setting EN pin low. 1_CHANNEL 4 R LED fault detection 0 = No fault 1 = 1 channel has generated either short or open fault. Fault pin is pulled to GND. Fault is cleared by reading the register 02h or setting EN pin low. BL_FAULT 3 R LED fault detection 0 = No fault 1 = LED fault detected. Generated with OR function of all LED faults. Fault pin is pulled to GND. Fault is cleared by reading the register 02h or setting EN pin low. OCP 2 R Overcurrent protection 0 = No fault 1 = Overcurrent detected in boost output. OCP detection block monitors the boost output and if the boost output has been too low for more than 50 ms it generates an OCP fault and disable the boost. Fault pin is pulled to GND. Fault is cleared by reading the register 02h or setting EN pin low. After clearing the fault boost starts up again. TSD 1 R Thermal shutdown 0 = No fault 1 = Thermal fault generated, 150°C reached. Boost converted and LED outputs are disabled until the temperature has dropped down to 130°C. Fault pin is pulled to GND. Fault is cleared by reading the register 02h or setting EN pin low. Copyright © 2010–2014, Texas Instruments Incorporated Submit Documentation Feedback 27 Product Folder Links: LP8550 |
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