LP3921

SNVS580A – AUGUST 2008 – REVISED MAY 2013

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LP3921 Pin Descriptions(1) (continued)

Pin#

Name

Type(1)

Description

4

VIN2

P

Battery Input for LDO3 - LDO7

5

LDO7

A

LDO7 Output (GP)

6

OUT+

AO

Differential output +

7

VDD

P

DC power input to audio amplifier

8

OUT-

AO

Differential output -

9

IN+

AI

Differential input +

10

IN-

AI

Differential input -

11

GND

G

Analog Ground Pin

12

BYPASS

A

Amplifier bypass cap

13

LDO4

A

LDO4 Output (TCXO)

14

LDO3

A

LDO3 Output (ANA)

15

LDO2

A

LDO2 Output (DIGI)

16

LDO1

A

LDO1 Output (CORE)

17

VIN1

P

Battery Input for LDO1 and LDO2

18

GNDA

G

Analog Ground pin

SDA

DI/O

Serial Interface, Data Input/Output Open Drain output, external pull up resistor is needed.

19

(typ. 1.5k)

20

SCL

DI

Serial Interface Clock input. External pull up resistor is needed. (typ. 1.5k)

21

BATT

P

Main battery connection. Used as a power connection for current delivery to the battery.

22

CHG_IN

P

DC power input to charger block from wall or car power adapters.

23

PWR_ON

DI

Power up sequence starts when this pin is set HIGH. Internal 500k. pull-down resistor.

IMON

A

Charge current monitor output. This pin presents an analog voltage representation of the

24

input charging current. VIMON (mV) = (2.47 x ICHG)(mA).

25

PS_HOLD

DI

Input for power control from external processor/controller.

26

TCXO_EN

DI

Enable control for LDO4 (TX). HIGH = Enable, LOW = Disable.

27

HF_PWR

DI

Power up sequence starts when this pin is set HIGH. Internal 500k. pull-down resistor.

28

VSS

G

Digital Ground pin

29

PON_N

DO

Active low signal is PWR_ON inverted.

RESET_N

DO

Reset Output. Pin stays LOW during power up sequence. 60 ms after LDO1 (CORE) is

30

stable this pin is asserted HIGH.

31

ACOK_N

DO

AC Adapter indicator, LOW when 4.5V- 6.0V present at CHG_IN.

32

RX_EN

DI

Enable control for LDO5 (RX). HIGH = Enable, LOW = Disable.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

6

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