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LP85571 数据表(PDF) 7 Page - Texas Instruments |
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LP85571 数据表(HTML) 7 Page - Texas Instruments |
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7 / 49 page ![]() LP8557, LP85571 www.ti.com SNVSA15B – DECEMBER 2013 – REVISED DECEMBER 2015 7.10 I 2C Serial Bus Timing Parameters (SDA, SCL) See (1) and Figure 1. PARAMETER MIN MAX UNIT ƒSCL Clock Frequency 400 kHz 1 Hold Time (repeated) START Condition 0.6 μs 2 Clock Low Time 1.3 μs 3 Clock High Time 600 ns 4 Setup Time for a Repeated START Condition 600 ns 5 Data Hold Time 50 ns 6 Data Setup Time 100 ns 7 Rise Time of SDA and SCL 20 + 0.1Cb 300 ns 8 Fall Time of SDA and SCL 15 + 0.1Cb 300 ns 9 Set-up Time for STOP condition 600 ns 10 Bus Free Time between a STOP and a START Condition 1.3 μs Capacitive Load Parameter for Each Bus Line Cb 10 200 ns Load of 1 pF corresponds to 1 ns. tWAIT Wait time from VDD = 2.7 V to 1 st I2C command 150 μs (1) Verified by design and not tested in production. Figure 1. I2C-Compatible Timing Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: LP8557 LP85571 |
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