Table 6-2. FRAM Status Memory Map (continued)

ADDRESS RANGE

TYPE (1)

DESCRIPTION

PROTECTION CODES (NOTES)

03C7h

R/(W)

Protection Control Byte (Block 7)

55h: Write Protect Block 7;

AAh: EPROM Mode Block 7;

55h or AAh: Write Protect 03C7h

03C8h-03CDh

R/(W)

USER EEPROM

03CEh

R/(W)

Memory Block Lock

55h or AAh: Copy Protect

Write-Protected Data Memory Pages

55h or AAh: Write Protect 03CEh

03CFh

R/(W)

Register Page Lock

55h or AAh: Copy Protect 03C0h-03CFh

03D0h

R/(W)

Factory Byte

55h or AAh: Write protect 03D0h-03D2h

Other: 03D0h-03D2h are programmable

03D1h

R/(W)

Manufacturer ID

03D2h

R/(W)

Manufacturer ID

03D3h

R

RESERVED

(1)

R = Read, W = Write

6.3.3 Address Registers and Transfer Status

The TMF0008 uses three address registers: TA1, TA2, and E/S (Figure 6-1, Figure 6-2, and Figure 6-3).

The registers TA1 and TA2 are loaded with the target address to which the data is to be written or from which

data is to be read. Register E/S is a read-only transfer status register used to verify data integrity with write

commands. During a Write Scratchpad command, the E/S bits E[4:0] are initially loaded with the incoming T[4:0]

and are then incremented on each incoming subsequent data byte. Thus, E[4:0] is the ending offset counter

within the 32-byte scratchpad. The PF bit of the E/S register is a Partial byte Flag and is set when the received

byte is partial (data bits not an integer multiple of 8) or if the scratchpad data is invalid due to a loss of power.

The PF bit is cleared when there is a successful scratchpad write. The AA (Authorization Accepted) bit of the

E/S register is set when there is an authorization match during a Copy Scratchpad command. If AA=1 and PF=0,

these values indicate that the data stored in the scratchpad has already been copied to the target memory. The

AA flag is cleared whenever data is written into the scratchpad. The AA flag is valid only if the PF flag is 0.

Figure 6-1. Target Address (TA1)

7

6

5

4

3

2

1

0

T7

T6

T5

T4

T3

T2

T2

T0

Figure 6-2. Target Address (TA2)

7

6

5

4

3

2

1

0

T15

T14

T13

T12

T11

T10

T9

T8

Figure 6-3. Ending Address with Data Status (E/S) (Read Only)

7

6

5

4

3

2

1

0

AA

0

PF

E4

E3

E2

E1

E0

6.3.4 Writing Data to the FRAM

The TMF0008 device does not allow writes to the FRAM memory directly by the host. Writing to the FRAM

memory directly by the host is achieved by using the scratchpad as an interim repository. To write into the

scratchpad, the host first issues the Write Scratchpad command followed by the desired target address and the

data to be written into the scratchpad. Depending on the conditions described in the Write Scratchpad Command

section, the host can receive an inverted CRC16 of the entire write scratchpad sequence (the write scratchpad is

commanded, the address and the data) at the end of the Write Scratchpad command sequence.

TMF0008

SLVSIV3 – JULY 2025

www.ti.com

10

Submit Document Feedback

Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TMF0008