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CB45000 数据表(PDF) 8 Page - STMicroelectronics |
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CB45000 数据表(HTML) 8 Page - STMicroelectronics |
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8 / 16 page ![]() CB45000 SERIES 8/16 ® which are true LSSD cells. Non-overlapping clock generator macros are also available. For parametric and Iddq testing, the I/O cells contain a dedicated test interface as described previously (See “I/O TEST INTERFACE” on page 6.) EVALUATION DEVICE An evaluation device is used to demonstrate the performance of the CB45000 series as well as verify the effectiveness of the design system. The device has path delays, latches and a set of macrocells and memory functions which were used to verify the simulated characteristics that are supplied in the data book. Characterization of the path delays including interconnect shows typical delays of 160 ps for a 2 input NAND with receivers/drivers operating at frequencies of 200 MHz. The evaluation device is available in a 208 pin plastic quad flat pack. Figure 5 Evaluation Device Cross Section |
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