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CB45000 SERIES

®

I/O BUFFER LIBRARY

The CB45000 does not use traditional I/O cell

design; SGS-THOMSON was one of the pioneers

of the emerging “Flexible I/O” approach and the

CB45000 features variable bonding and a flexible

output transistor scheme based on a predefined

set of I/O transistor subcells.

These subcells can be quickly configured using

metallization layers to conform to a variety of I/O

specifications whilst maintaining optimal ESD

protection

levels

and

latch-up

prevention

characteristics.

The I/O circuitry also includes subcells of

specialized transistors that are used to form the

slew rate control sections of each I/O line.

Current spike suppression logic ensures that

conducting transistors are turned off before the

opposing set are turned on.

The bond pad itself is variable in terms of pitch

and size and even supports staggered bonding

methodologies.

This

is

becoming

far

more

Table 2 Voltage Multipliers

2.7

1.20

3.0

1.11

3.3

1.00

3.6

0.94

Figure 3

Flexible IO Buffer Technology

OUTPUT

DRIVE

TRANSISTORS

LOGIC CIRCUITS

TEST INTERFACE

SLEW CONTROL

DIE CORE

GUARDRING

EDGE OF DIE

DIODES

ESD CLAMP

STRUCTURES

OUTPUT

DRIVE

TRANSISTORS

LOGIC CIRCUITS

TEST INTERFACE

SLEW CONTROL

DIODES

ESD CLAMP

STRUCTURES

OUTPUT

DRIVE

TRANSISTORS

LOGIC CIRCUITS

TEST INTERFACE

SLEW CONTROL

DIODES

ESD CLAMP

STRUCTURES

OUTPUT

DRIVE

TRANSISTORS

LOGIC CIRCUITS

TEST INTERFACE

SLEW CONTROL

DIODES

ESD CLAMP

STRUCTURES

OUTPUT

DRIVE

TRANSISTORS

LOGIC CIRCUITS

TEST INTERFACE

SLEW CONTROL

DIODES

ESD CLAMP

STRUCTURES

OUTPUT

DRIVE

TRANSISTORS

LOGIC CIRCUITS

TEST INTERFACE

SLEW CONTROL

DIODES

ESD CLAMP

STRUCTURES

GUARDRING

EDGE OF DIE

Programmable pad locations allows

one IO cell library to be used for both

staggered and linear bonding.

DIE CORE