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M41ST85WMH6F 数据表(PDF) 26 Page - STMicroelectronics

部件名 M41ST85WMH6F
功能描述  3.0/3.3 V I²C combination serial RTC, NVRAM supervisor and microprocessor supervisor
PDF  43 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M41ST85WMH6F 数据表(HTML) 26 Page - STMicroelectronics

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Clock operation
M41ST85W
26/43
DocID7531 Rev 12
3.7
Power-on reset
The M41ST85W continuously monitors VCC. When VCC falls to the power fail detect trip
point, the RST pulls low (open drain) and remains low on power-up for trec after VCC passes
VPFD(max). The RST pin is an open drain output and an appropriate pull-up resistor should
be chosen to control rise time.
3.8
Reset inputs (RSTIN1 & RSTIN2)
The M41ST85W provides two independent inputs which can generate an output reset. The
duration and function of these resets is identical to a reset generated by a power cycle.
Table 5
and Figure 17 illustrate the AC reset characteristics of this function. Pulses shorter
than tRLRH1 and tRLRH2 will not generate a reset condition. RSTIN1 and RSTIN2 are each
internally pulled up to VCC through a 100 kΩ resistor.
Figure 17. RSTIN1 & RSTIN2 timing waveforms
Note:
With pull-up resistor
Table 5. Reset AC characteristics
3.9
Power-fail input/output
The power-fail input (PFI) is compared to an internal reference voltage (1.25 V). If PFI is
less than the power-fail threshold (VPFI), the power-fail output (PFO) will go low. This
function is intended for use as an undervoltage detector to signal a failing power supply.
Typically PFI is connected through an external voltage divider (see Figure 5 on page 11) to
either the unregulated DC input (if it is available) or the regulated output of the VCC
AI03665
RSTIN2
RST
(1)
RSTIN1
tRLRH1
tRLRH2
tR1HRH
tR2HRH
Symbol
Parameter(1)
Min
Max
Unit
tRLRH1
(2)
RSTIN1 low to RSTIN1 high
200
ns
tRLRH2
(3)
RSTIN2 low to RSTIN2 high
100
ms
tR1HRH
(4)
RSTIN1 high to RST high
40
200
ms
tR2HRH
(4)
RSTIN2 high to RST high
40
200
ms
1. Valid for ambient operating temperature: TA = –40 to 85°C; VCC = 2.7 to 3.6 V (except where noted).
2. Pulse width less than 50 ns will result in no RESET (for noise immunity).
3. Pulse width less than 20 ms will result in no RESET (for noise immunity).
4. Programmable (see Table on page 28).



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