M41ST85WMH6F datasheet(28/43 Pages) STMICROELECTRONICS

28 / 43 page

Clock operation

M41ST85W

28/43

DocID7531 Rev 12

powered-up periodically (at least once every few months) in order for this technique to be

beneficial. Additionally, if a battery low is indicated, data integrity should be verified upon

power-up via a checksum or other technique.

3.13

trec bit

Bit D7 of clock register 04h contains the trec bit (TR). trec refers to the automatic

continuation of the deselect time after VCC reaches VPFD. This allows for a voltage settling

time before WRITEs may again be performed to the device after a power-down condition.

The trec bit will allow the user to set the length of this deselect time as defined by Table .

3.14

Initial power-on defaults

Upon initial application of power to the device, the following register bits are set to a '0' state:

watchdog register, FT, AFE, ABE, SQWE, and TR. The following bits are set to a '1' state:

ST, OUT, and HT (see Table ).

Table 6. trec definitions

trec bit (TR)

STOP bit (ST)

trec time

Units

Min

Max

200(1)

1. Default setting

2000

µs

Table 7. Default values

Condition

Out

AFE

ABE

SQWE

Watchdog

1. WDS, BMB0-BMB4, RB0, RB1.

Initial power-up(2)

2. State of other control bits undefined.

Subsequent power-up

(with battery backup)(3)

3. UC = Unchanged

M41ST85WMH6F 数据表(PDF) 28 Page - STMicroelectronics

M41ST85WMH6F 数据表(HTML) 28 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

数据表下载