IS25LE01G-RILA3-TY datasheet(144/186 Pages) ISSI

部件名	IS25LE01G-RILA3-TY

功能描述	SERIAL FLASH MEMORY 133/104MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC

PDF	186 Pages

Scroll/Zoom	100%

制造商	ISSI [Integrated Silicon Solution, Inc]

网页	http://www.issi.com

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144 / 186 page

IS25LE01G

IS25WE01G

Integrated Silicon Solution, Inc.- www.issi.com

144

Rev. A6

01/14/2025

8.46 READ BANK ADDRESS REGISTER OPERATION (RDBR: 16h/C8h)

The Read Bank Address Register (RDBR) instruction allows the Bank Address Register contents to be read. RDBR

is used to read only a volatile Bank Address Register.

The instruction code is first shifted in. Then the 8-bit Bank Register is shifted out. It is possible to read the Bank

Address Register continuously by providing multiples of eight bits.

Data is shifted in from SI and data is shifted out from SO in SPI sequence whereas data in and out is via four pins

(IO0-IO3) in QPI sequence.

Figure 8.102 Read Bank Address Register Sequence In SPI Mode

Instruction = 16h/C8h

CE #

SCK

Data Out

Mode 3

Mode 0

Figure 8.103 Read Bank Address Register Sequence In QPI Mode

16h/C8h

Mode 3

Mode 0

7:4

3:0

CE#

SCK

IO[3:0]

Data Out

IS25LE01G-RILA3-TY 数据表(PDF) 144 Page - Integrated Silicon Solution, Inc