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IS25LE01G-RILA3-TY 数据表(PDF) 152 Page - Integrated Silicon Solution, Inc

部件名 IS25LE01G-RILA3-TY
功能描述  SERIAL FLASH MEMORY 133/104MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  186 Pages
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制造商  ISSI [Integrated Silicon Solution, Inc]
网页  http://www.issi.com
标志 ISSI - Integrated Silicon Solution, Inc

IS25LE01G-RILA3-TY 数据表(HTML) 152 Page - Integrated Silicon Solution, Inc

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IS25LE01G
IS25WE01G
Integrated Silicon Solution, Inc.- www.issi.com
152
Rev. A6
01/14/2025
8.52 READ PPB OPERATION (RDPPB, FCh or 4RDPPB, E2h)
FCh (EXTADD=0) is followed by a 3-byte address (A23-A0) or
FCh (EXTADD=1) is followed by a 4-byte address (A31-A0) or
E2h is followed by a 4-byte address (A31-A0)
The instruction code is shifted into SI by the rising edges of the SCK signal, followed by the 24-bit or 32-bit address
selecting location zero within the desired sector/block as above. Then the 8-bit PPB Access Register contents are
shifted out on SO. The RDPPB/4RDPPB is supporting only SPI, not supporting QPI.
It is possible to read the same PPB Access Register continuously by providing multiples of eight bits. The address
of the PPB Access Register does not increment so this is not a means to read the entire PPB array. Each location
must be read with a separate Read PPB command.
Note: Data must be either 00h (protected) or FFh (unprotected).
Figure 8.116 Read PPB Sequence (FCh [EXTADD=0], 3-byte address)
Instruction = FCh
CE #
SCK
SI
SO
0
1
...
7
8
9
...
31
32
33
34
35
36
37
38
39
Mode 3
Mode 0
3-byte Address
tV
7
3
2
1
0
6
5
4
Figure 8.117 Read PPB Sequence (FCh [EXTADD=1] or E2h, 4-byte address)
Instruction = FCh/E2h
CE #
SCK
SI
SO
0
1
...
7
8
9
...
39
40
41
42
43
44
45
46
47
Mode 3
Mode 0
4-byte Address
tV
7
3
2
1
0
6
5
4



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