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IS25LE02GG-RHLA2:P-TY 数据表(PDF) 86 Page - Integrated Silicon Solution, Inc

部件名 IS25LE02GG-RHLA2:P-TY
功能描述  SERIAL FLASH MEMORY 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  187 Pages
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制造商  ISSI [Integrated Silicon Solution, Inc]
网页  http://www.issi.com
标志 ISSI - Integrated Silicon Solution, Inc

IS25LE02GG-RHLA2:P-TY 数据表(HTML) 86 Page - Integrated Silicon Solution, Inc

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IS25LE02GG
IS25WE02GG
Integrated Silicon Solution, Inc.- www.issi.com
86
Rev. A1
10/02/2025
8.12 QUAD I/O PAGE PROGRAM OPERATION (PPQIO, 38h or 4PPQIO, 3Eh)
The Quad I/O Page Program instruction transfers address and data (up to 256/512 bytes) in a single operation with
four pins (IO0, IO1, IO2 and IO3).
The destination of the memory to be programmed must be outside the protected memory area set by the Block
Protection (BP3, BP2, BP1, BP0) bits or ASP. A Quad I/O Page Program instruction which attempts to program
into a page that is write-protected will be ignored.
Before the execution of Quad I/O Page Program instruction, the QE bit in the Status Register must be set to “1”
and the Write Enable Latch (WEL) must be enabled through a Write Enable (WREN) instruction.
• 38h (EXTADD=0) is followed by a 3-byte address (A23-A0) or
• 38h (EXTADD=1) is followed by a 4-byte address (A31-A0) or
• 3Eh is followed by a 4-byte address (A31-A0)
Program operation will start immediately after the CE# is brought high, otherwise the Quad Input Page Program
instruction will not be executed. The internal control logic automatically handles the programming voltages and
timing. The progress or completion of the program operation can be determined by reading the WIP bit. If the WIP
bit is “1”, the program operation is still in progress. If WIP bit is “0”, the program operation has completed.
If more than 256/512 bytes data are sent to a device, the address counter rolls over within the same page, the
previously latched data are discarded, and the last 256/512 bytes data are kept to be programmed into the page.
The starting byte can be anywhere within the page. When the end of the page is reached, the address will wrap
around to the beginning of the same page. If the data to be programmed are less than a full page, the data of all
other bytes on the same page will remain unchanged.
Note: A program operation can alter “1”s into “0”s, but an erase operation is required to change “0”s back to “1”s.
When ECC is ON, ECC protection applied on each 128-bit boundary, so the device only allows a single
programming operation to each 16-byte boundary between erase operations. Incremental programming is not
allowed and ignored.
Figure 8.27 Quad I/O Page Program operation (38h [EXTADD=0], 3-byte address)
Instruction = 38h
20
CE#
SCK
4
0
4
0
3-byte Address
High Impedance
16
...
0
0
1
2
3
4
5
6
7
8
9
15
16
17
18
19
Mode 3
Mode 0
IO0
IO1
Data In 2
IO2
IO3
...
Data In 1
...
...
21
5
1
5
1
17
...
1
...
22
6
2
6
2
18
...
2
...
23
7
3
7
3
19
...
3
...



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