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IS25LE02GG-RHLA2:P-TY 数据表(PDF) 34 Page - Integrated Silicon Solution, Inc

部件名 IS25LE02GG-RHLA2:P-TY
功能描述  SERIAL FLASH MEMORY 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  187 Pages
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制造商  ISSI [Integrated Silicon Solution, Inc]
网页  http://www.issi.com
标志 ISSI - Integrated Silicon Solution, Inc

IS25LE02GG-RHLA2:P-TY 数据表(HTML) 34 Page - Integrated Silicon Solution, Inc

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IS25LE02GG
IS25WE02GG
Integrated Silicon Solution, Inc.- www.issi.com
34
Rev. A1
10/02/2025
PPBLK bit: The PPB Lock bit is a volatile bit for protecting all PPB bits. When cleared to 0, it locks all PPBs, when
set to 1, it allows the PPBs to be changed. The WRPLB command is used to clear the PPB Lock bit to 0. The PPB
Lock bit must be cleared to 0 only after all the PPBs are configured to the desired settings.
In Persistent Protection mode, the PPB Lock bit is set to 1 during POR or Hardware Reset. When cleared to 0, no
software command sequence can set the PPB Lock bit to 1, only another Hardware Reset or power-up can set the
PPB Lock bit.
In the Password Protection mode, the PPB Lock bit is cleared to 0 during POR or Hardware Reset. The PPB Lock
bit can only be set to 1 by the Unlock Password command.
FREEZE bit: FREEZE bit, when set to “1”, locks the current state of BP3-0 in Status Register, TBS in the Function
Register, TBPARM in the Advanced Sector/Block Protection Register, and the Information Row. This prevents
writing, programming, or erasing these areas. As long as FREEZE remains cleared to logic “0”, BP3-0 in Status
Register, TBS in the Function Register, and TBPARM in the Advanced Sector/Block Protection Register are
writable and the Information Row is programmable. Once FREEZE has been written to a logic “1” it can only be
cleared to a logic “0” by a power-on cycle or a Hardware Reset. Software Reset will not affect the state of FREEZE.
The FREEZE is volatile and the default state of FREEZE after power-on is “0”. The FREEZE can be set to “1” by a
SFRZ command.
6.5.4 PPB REGISTER
Related Commands: Read PPB (RDPPB FCh or 4RDPPB E2h)), Program PPB (PGPPB FDh or 4PGPPB E3h),
and Erase PPB (ERPPB E4h).
Table 6.22 PPB Register Bit Definition
Bit
Name
Definition
Default
Read-
/Write
Type
7:0
PPB
Read or Program per sector/block PPB:
00h = PPB for the sector/block addressed by the RDPPB or
PGPPB command is programmed to “0”, protecting
that sector/block from program or erase operations.
FFh = PPB for the sector/block addressed by the RDPPB
or
PGPPB command is erased to “1”, not protecting
that sector/block from program or erase operations.
FFh
R/W
Non-Volatile
6.5.5 DYB REGISTER
Related Commands: Read DYB (RDDYB FAh or 4RDDYB E0h) and Write DYB (WRDYB FBh or 4WRDYB E1h).
Table 6.23 DYB Register Bit Definition
Bit
Name
Definition
Default
Read-
/Write
Type
7:0
DYB
Read or Write per sector/block DYB:
00h = DYB for the sector/block addressed by the RDDYB
or
WRDYB command is cleared to “0”, protecting that
sector/block from program or erase operations.
FFh = DYB for the sector/block addressed by the RDDYB
or
WRDYB command is set to “1”, not protecting that
sector/block from program or erase operations.
FFh
R/W
Volatile



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