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IS25LE02GG-RHLA2:P-TY 数据表(PDF) 162 Page - Integrated Silicon Solution, Inc

部件名 IS25LE02GG-RHLA2:P-TY
功能描述  SERIAL FLASH MEMORY 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  187 Pages
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制造商  ISSI [Integrated Silicon Solution, Inc]
网页  http://www.issi.com
标志 ISSI - Integrated Silicon Solution, Inc

IS25LE02GG-RHLA2:P-TY 数据表(HTML) 162 Page - Integrated Silicon Solution, Inc

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IS25LE02GG
IS25WE02GG
Integrated Silicon Solution, Inc.- www.issi.com
162
Rev. A1
10/02/2025
8.63 UNLOCK PASSWORD OPERATION (UNPWD, E9h)
The UNPWD command is entered by driving CE# low, followed by the instruction code and the password data
bytes, least significant byte first, most significant bit of each byte first. The password is 64bits in length.
CE# must be driven high after the 64th bit of data has been latched. If not, the UNPWD command is not executed.
As soon as CE# is driven high, the UNPWD operation is initiated. While the UNPWD operation is in progress, the
Status Register or Extended Read Register may be read to check the value of the Write In Progress (WIP) bit. The
WIP bit is “1” during the UNPWD operation, and is “0” when it is completed.
If the UNPWD command supplied password does not match the hidden password in the Password Register, the
UNPWD command is ignored. This returns the device to standby state, ready for a new command such as a retry
of the UNPWD command. If the password does match, the PPB Lock bit is set to “1”.
Figure 8.141 Unlock Password Sequence In SPI Mode
Instruction = E9h
CE #
SCK
SI
SO
0
1
...
7
8
9
...
15
16
17
...
23
...
64
65
...
Mode 3
Mode 0
7
15
14
8
6
...
0
63
62
56
...
...
...
71
1st byte Data In
2nd byte Data In
...
8th byte Data In
High Impedence
Figure 8.142 Unlock Password Sequence In QPI Mode
E9h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0
2
3
4
5
1st byte
Data In
2nd byte
Data In
...
8th byte
Data In
...
16
17



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