STM32H533CE datasheet(51/231 Pages) STMICROELECTRONICS

部件名	STM32H533CE

功能描述	Arm® Cortex®-M33 32-bit MCUTrustZone® FPU, 375 DMIPS 250 MHz, 512-Kbyte flash, 272-Kbyte RAM, cryptography

PDF	231 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

51 / 231 page

DS14539 Rev 1

51/231

STM32H533xx

Functional overview

3.36

Improved inter-integrated circuit (I3C)

The I3C interface handles communication between the MCU and others, like sensors and

host processor(s), all connected on an I3C bus.

The peripheral implements the required features of the MIPI I3C specification v1.1. It can

control I3C bus-specific sequencing, protocol, arbitration and timing, and can act as

controller (formerly known as master) or as target (formerly known as slave). When acting

as controller the peripheral improves the features of the I2C interface, preserving some

backward compatibility: it allows an I2C target to operate on an I3C bus in legacy I2C

fast-mode (Fm) or legacy I2C fast-mode plus (Fm+), provided that the latter does not

perform clock stretching.

The I3C peripheral can be used with DMA to off-load the CPU.

Table 8. I2C implementation

I2C features(1)

1. X: supported

I2C1

I2C2

I2C3

Standard-mode (up to 100 Kbit/s)

Fast-mode (up to 400 Kbit/s)

Fast-mode Plus with 20 mA output drive I/Os (up to 1 Mbit/s)

Programmable analog and digital noise filters

SMBus/PMBus hardware support

Independent clock

Wakeup capability

STM32H533CE 数据表(PDF) 51 Page - STMicroelectronics