NRF51822-CFAB-R datasheet(46/130 Pages) NORDIC

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Page 46

nRF51822 Product Specification v3.3

Power on reset time (tPOR) is the time from when the supply starts rising to when the device comes out of

reset and the CPU starts. The time increases with, and is inclusive of, supply rise time from 0 V to VDD.

Table 30 gives tPOR for a number of supply rise times, simulated with a linear ramp from 0 V to VDD, over the

supply voltage range 1.8 V to 3.6 V.

Table 30 Power on reset time

The data in Figure 10 and Table 31 show measured t_POR data. Measurements were taken using the

reference circuit shown in Section 11.3.1 “QFAA QFN48 schematic with internal LDO setup” on page 82 with

the given supply voltage and temperature conditions.

Figure 10 Power on reset time (Test level 2)

Table 31 Supply rise time at sample voltages for the measured data shown in Figure 10.

Symbol

Description

Note

Min.

Typ.

Max.

Units

Test

level

tPOR, 10 μs

Power on reset time, 10 μs rise

time (0 V to VDD).

0.7

2.4

tPOR, 1 ms

Power on reset time, 1 ms rise

time (0 V to VDD).

1.7

3.4

tPOR, 10 ms

Power on reset time, 10 ms rise

time (0 V to VDD).

tPOR, 100 ms

Power on reset time, 100 ms rise

time (0 V to VDD).

101

115

VDD

Rise Time from 10% to 90% of VDD

1.8

570 μs

3.0

605 μs

3.6

635 μs

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