数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

M14C64 数据表(PDF) 7 Page - STMicroelectronics

部件名 M14C64
功能描述  Memory Card IC 64/32 Kbit Serial I²C Bus EEPROM
PDF  14 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M14C64 数据表(HTML) 7 Page - STMicroelectronics

Back Button M14C64 Datasheet HTML 3Page - STMicroelectronics M14C64 Datasheet HTML 4Page - STMicroelectronics M14C64 Datasheet HTML 5Page - STMicroelectronics M14C64 Datasheet HTML 6Page - STMicroelectronics M14C64 Datasheet HTML 7Page - STMicroelectronics M14C64 Datasheet HTML 8Page - STMicroelectronics M14C64 Datasheet HTML 9Page - STMicroelectronics M14C64 Datasheet HTML 10Page - STMicroelectronics M14C64 Datasheet HTML 11Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 14 page
background image
7/14
M14C64, M14C32
typical time is shorter. To make use of this, an ACK
polling sequence can be used by the master.
The sequence, as shown in Figure 8, is as follows:
– Initial condition: a Write is in progress.
– Step 1: the master issues a START condition
followed by a device select byte (first byte of the
new instruction).
– Step 2: if the memory is busy with the internal
write cycle, no ACK will be returned and the
master goes back to Step 1. If the memory has
terminated the internal write cycle, it responds
with an ACK, indicating that the memory is
ready to receive the second part of the next in-
struction (the first byte of this instruction having
been sent during Step 1).
Read Operations
Read operations are independent of the state of
the WC pin. On delivery, the memory content is set
at all “1’s” (FFh).
ed. The transfer is terminated by the master
generating a STOP condition. Care must be taken
to avoid address counter ’roll-over’ which could re-
sult in data being overwritten. Note that, for any
byte or page write mode, the generation by the
master of the STOP condition starts the internal
memory program cycle. This STOP condition trig-
gers an internal memory program cycle only if the
STOP condition is internally decoded immediately
after the ACK bit; any STOP condition decoded
out of this "10th bit" time slot will not trigger the in-
ternal programming cycle. All inputs are disabled
until the completion of this cycle and the Memory
will not respond to any request.
Minimizing System Delays by Polling On ACK
During the internal write cycle, the memory discon-
nects itself from the bus, and copies the data from
its internal latches to the memory cells. The maxi-
mum write time (tw) is indicated in Table 7, but the
Figure 8. Write Cycle Polling Flowchart using ACK
WRITE Cycle
in Progress
AI02165
Next
Operation is
Addressing the
Memory
START Condition
DEVICE SELECT
with RW = 0
ACK
Returned
YES
NO
YES
NO
ReSTART
STOP
Proceed
WRITE Operation
Proceed
Random Address
READ Operation
Send
Byte Address
First byte of instruction
with RW = 0 already
decoded by M14xxx



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com