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M14C64 数据表(PDF) 4 Page - STMicroelectronics |
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M14C64 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 14 page ![]() M14C64, M14C32 4/14 Memory Addressing To start communication between the bus master and the slave memory, the master must initiate a START condition. Following this, the master sends 8 bits to the SDA bus line (with the most significant bit first). These bits represent the Device Select Code (7 bits) and a RW bit. The seven most significant bits of the Device Se- lect Code are the Device Type Identifier, according to the I2C bus definition. For the memory device, Figure 5. I2C Bus Protocol SCL SDA SCL SDA SDA START CONDITION SDA INPUT SDA CHANGE AI00792 STOP CONDITION 1 23 7 89 MSB ACK START CONDITION SCL 1 23 7 89 MSB ACK STOP CONDITION Table 5. Device Select Code 1 Note: 1. The most significant bit, b7, is sent first. Device Code Chip Enable RW b7 b6 b5 b4 b3 b2 b1 b0 Device Select 1010000 RW Note: 1. b15 to b13 are Don’t Care on the M14C64 series. b15 to b12 are Don’t Care on the M14C32 series. Table 3. Most Significant Byte b15 b14 b13 b12 b11 b10 b9 b8 Table 4. Least Significant Byte b7 b6 b5 b4 b3 b2 b1 b0 |
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