APM32E103CEU6-R datasheet(28/79 Pages) GEEHY

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interrupt is enabled, the software can receive the related interrupt.

4.5.3.

Bus clock

AHB, APB1 and APB2 are built in. The clock source of AHB is SYSCLK, and the clock source of

APB1 and APB2 is HCLK; the required clock can be obtained by configuring the frequency

dividing coefficient. The maximum frequency of AHB and high-speed APB2 is 120MHz, and the

maximum frequency of APB1 is 60MHz.

4.6.

Power supply and power management

4.6.1.

Power supply scheme

Table 6 Power Supply Scheme

Name

Voltage range

Instruction

VDD

2.0～3.6V

I/Os (see pin distribution diagram for specific IO) and internal voltage regulator

are powered through VDD pin.

VDDA/VSSA

2.0～3.6V

Power supply of ADC, DAC, reset module, RC oscillator and PLL analog part;

when ADC or DAC is used, VDDA shall not be less than 2.4V; VDDA and VSSA

must be connected to VDD and VSS.

VBAT

1.8～3.6V

When VDD is closed, RTC, external 32KHz oscillator and backup register are

supplied through internal power switch.

4.6.2.

Voltage regulator

Table 7 Regulator Operating Mode

Name

Instruction

Master mode (MR)

Used in run mode

Low-power mode (LPR)

Used in stop mode

Power-down mode

Used in standby mode, when the voltage regulator has high impedance output, the core

circuit is powered down, the power consumption of the voltage regulator is zero, and all

data of registers and SRAM will be lost.

Note: The voltage regulator is always in working state after reset, and outputs with high impedance in power-down

mode.

4.6.3.

Power supply voltage monitor

Power-on reset (POR) and power-down reset (PDR) circuits are integrated inside the product.

These two circuits are always in working condition. When the power-down reset circuit

monitors that the power supply voltage is lower than the specified threshold value (VPOR/PDR),

even if the external reset circuit is used, the system will remain reset.

The product has a built-in programmable voltage regulator (PVD) that can monitor VDD and

compare it with VPVD threshold. When VDD is outside the VPVD threshold range and the interrupt

is enabled, the MCU can be set to a safe state through the interrupt service program.

4.7.

Low-power mode

APM32E103xCxE supports three low-power modes, namely, sleep mode, stop mode and

standby mode, and there are differences in power, wake-up time and wake-up mode among

these three modes. The low-power mode can be selected according to the actual application

requirements.

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