STR71XF datasheet(17/78 Pages) STMICROELECTRONICS

17 / 78 page

STR71xF

System architecture

17/78

H12 V33IO-PLL

Supply voltage for digital I/O circuitry and for PLL

reference4)

H11 VSSIO-PLL

Ground voltage for digital I/O circuitry and for PLL

reference4)

H10

P1.7/T1.OCM

I/O pu

4mA

Port 1.7

Timer 1:

Output

Compare A

P1.8

I/O pd

4mA

Port 1.8

G12 N.C.

Not connected (not bonded)

F12 P1.11/CANRX I/O pu

CT X 4mA X

Port 1.11

CAN: receive data input

Note: On STR710 and STR712 only

P1.12/CANTX

I/O pu

4mA

Port 1.12

CAN: Transmit data output

Note: On STR710 and STR712 only

G11 USBDP

I/O

USB bidirectional data (data +). Reset state = HiZ

Note: On STR710 and STR711 only

This pin requires an external pull-up to V33 to

maintain a high level.

G10 USBDN

I/O

USB bidirectional data (data -). Reset state = HiZ

Note: On STR710 and STR711 only.

D.10

I/O

8mA

External Memory Interface: data bus

D.11

I/O

8mA

D.12

I/O

8mA

F11 D.13

I/O

8mA

F10 D.14

I/O

8mA

D.15

I/O

8mA

A.0

8mA

External Memory Interface: address bus

E12 A.1

8mA

100 E11 A.2

8mA

101 C12 A.3

8mA

102 B12 A.4

8mA

103 E10 VSS

Ground voltage for digital I/O circuitry4)

104

V33

Supply voltage for digital I/O circuitry4)

105 D12 P1.9

I/O pd

4mA

Port 1.9

106 D11

P1.10/

USBCLK

I/O pd

4mA

Port 1.10

USB: 48 MHZ

clock input

Table 4.

STR710 pin description

Pin n°

Pin name

Input

Output

Main

function

(after

reset)

Alternate function

STR71XF 数据表(PDF) 17 Page - STMicroelectronics

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STR71XF 数据表(PDF) 17 Page - STMicroelectronics

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