STR71XF datasheet(28/78 Pages) STMICROELECTRONICS

部件名	STR71XF

功能描述	ARM7TDMI??32-bit MCU with Flash, USB, CAN 5 timers, ADC, 10 communications interfaces

PDF	78 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

28 / 78 page

System architecture

STR71xF

28/78

The Reset configuration of the I/O Ports is IPUPD (input pull-up/pull down). Refer to Table 8 on page 29.

The Port bit configuration at reset is PC0=1, PC1=1, PC2=0. The port data register bit (PD) value depends

on the pu/pd column which specifies whether the pull-up or pull-down is enabled at reset

V33IO-PLL and V33 are internally connected. VSSIO-PLL and VSS are internally connected.

3.5

External connections

Figure 5.

Recommended external connection of V18 and V18BKP pins

63 C4

P0.8/U0.RX/U

0.TX

I/O

CT X4mA T

Port 0.8

UART0:

Receive Data

input

UART0: Transmit data

output.

Note: This pin may be used for single wire UART

(half duplex) if programmed as Alternate Function

Output. The pin will be tri-stated except when

UART transmission is in progress

P0.9/U0.TX/B

OOT.0

I/O

4mA

Port 0.9

Select Boot

Configuration

input

UART0: Transmit data

output

Table 7.

STR711/STR712/STR715 pin description

Pin n°

Pin name

Input

Output

Main

function

(after

reset)

Alternate function

LQFP144

LQFP64

129 128

33 nF

10 µF

33 nF

54 55

1µF

25 26

1µF

V18BKP

V18

V18BKP

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