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M41T94 数据表(PDF) 21 Page - STMicroelectronics

部件名 M41T94
功能描述  512 Bit 64 bit x8 SERIAL RTC SPI SRAM
PDF  31 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M41T94 数据表(HTML) 21 Page - STMicroelectronics

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M41T94
Power-on Reset
The M41T94 continuously monitors VCC. When
VCC falls to the power fail detect trip point, the RST
pulls low (open drain) and remains low on power-
up for tREC after VCC passes VPFD (max). The RST
pin is an open drain output and an appropriate
pull-up resistor should be chosen to control rise
time.
Reset Inputs (RSTIN1 & RSTIN2)
The M41T94 provides two independent inputs
which can generate an output reset. The duration
and function of these resets is identical to a reset
generated by a power cycle. Table 13, page 21
and Figure 17, page 21 illustrate the AC reset
characteristics of this function. Pulses shorter than
tRLRH1 and tRLRH2 will not generate a reset condi-
tion. RSTIN1 and RSTIN2 are each internally
pulled up to VCC through a 100kΩ resistor.
Figure 17. RSTIN1 and RSTIN2 Timing Waveforms
Table 13. Reset AC Characteristics
Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.7 to 5.5V (except where noted).
2. Pulse width less than 50ns will result in no RESET (for noise immunity).
3. Pulse width less than 20ms will result in no RESET (for noise immunity).
4. Programmable (see Table 14, page 23).
Symbol
Parameter(1)
Min
Max
Unit
tRLRH1
(2)
RSTIN1 Low to RSTIN1 High
200
ns
tRLRH2
(3)
RSTIN2 Low to RSTIN2 High
100
ms
tR1HRH
(4)
RSTIN1 High to RST High
40
200
ms
tR2HRH
(4)
RSTIN2 High to RST High
40
200
ms
AI03665
RSTIN2
RST
(1)
RSTIN1
tRLRH1
tRLRH2
tR1HRH
tR2HRH



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