数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

STA328 数据表(PDF) 22 Page - STMicroelectronics

部件名 STA328
功能描述  2.1-channel high-efficiency digital audio system
PDF  57 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA328 数据表(HTML) 22 Page - STMicroelectronics

Back Button STA328 Datasheet HTML 18Page - STMicroelectronics STA328 Datasheet HTML 19Page - STMicroelectronics STA328 Datasheet HTML 20Page - STMicroelectronics STA328 Datasheet HTML 21Page - STMicroelectronics STA328 Datasheet HTML 22Page - STMicroelectronics STA328 Datasheet HTML 23Page - STMicroelectronics STA328 Datasheet HTML 24Page - STMicroelectronics STA328 Datasheet HTML 25Page - STMicroelectronics STA328 Datasheet HTML 26Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 22 / 57 page
background image
Register description
STA328
22/57
The on-chip STA328 power output block provides feedback to the digital controller using
inputs to the power control block. The TWARN input is used to indicate a thermal warning
condition. When TWARN is asserted (set to 0) for a period greater than 400 ms, the power
control block will force an adjustment to the modulation limit in an attempt to eliminate the
thermal warning condition. Once the thermal warning volume adjustment is applied,
whether the gain is reapplied when TWARN is de-asserted is dependent on the TWRB bit.
The DDX® power block can provide feedback to the digital controller using inputs to the
power control block. The FAULT input is used to indicate a fault condition (either over-current
or thermal). When FAULT is asserted (set to 0), the power control block will attempt a
recovery from the fault by asserting the 3-state output (setting it to 0 which directs the power
output block to begin recovery). It holds it at 0 for period of time in the range of 0.1 ms to 1 s
as defined by the fault-detect recovery constant register (FDRC registers 0x29 to 0x2A),
then toggle it back to 1. This sequence is repeated as log as the fault indication exists. This
feature is enabled by default but can be bypassed by setting the FDRB control bit to 1.
Table 15.
Thermal warning adjustment bypass
Bit
R/W
RST
Name
Description
6RW
1
TWAB
Thermal warning adjustment bypass:
0: thermal warning adjustment enabled
1: thermal warning adjustment disabled
Table 16.
Fault detect recovery bypass
Bit
R/W
RST
Name
Description
7RW
0
FDRB
Fault detector recovery bypass:
0: fault detector recovery enabled
1: fault detector recovery disabled



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com