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APM32F103C8T6-R 数据表(PDF) 49 Page - Geehy Semiconductor Co., Ltd. |
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APM32F103C8T6-R 数据表(HTML) 49 Page - Geehy Semiconductor Co., Ltd. |
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49 / 78 page ![]() w w w. g e e h y. c o m P a g e 48 Figure 15 SPI Timing Diagram - Slave Mode and CPHA=0 NSS Input MOSI Input MISO Output CPHA=0 CPOL=0 CPHA=0 CPOL=1 MSB OUT BIT 6~1 OUT LSB OUT LSB IN MSB IN BIT 6~1 IN th(NSS) tc(SCK) tr(SCK) tf(SCK) tdls(SO) th(SO) tV(SO) ta(SO) tSU(SI) tSU(NSS) th(SCKH) tW(SCKL) SCK Input Figure 16 SPI Timing Diagram - Slave Mode and CPHA=1 NSS Input MISO Output CPHA=1 CPOL=0 CPHA=1 MSB out BIT 6~1 OUT LSB OUT LSB IN Msb in BIT 6~1 IN tc(SCK) th(SI) tSU(SI) th(NSS) MOSI Input CPOL=1 SCK Input tSU(NSS) tW(SCKH) tW(SCKL) ta(SO) tV(SO) th(SO) tf(SCK) tr(SCK) tdls(SO) Note: The measuring points are set at CMOS levels: 0.3VDD and 0.7VDD. |
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