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AS7341 数据表(PDF) 46 Page - ams-OSRAM AG

部件名 AS7341
功能描述  11-Channel Multi-Spectral Digital Sensor
PDF  69 Pages
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制造商  AMSOSRAM [ams-OSRAM AG]
网页  https://ams-osram.com/
标志 AMSOSRAM - ams-OSRAM AG

AS7341 数据表(HTML) 46 Page - ams-OSRAM AG

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AS7341
Register Description
Datasheet
• PUBLIC
DS000504
• v3-00 • 2020-Jun-25
68
│ 45
STATUS Register (Address 0x93)
The primary status register for AS7341 indicates if there are saturation or interrupt events that need to
be handled by the user. This register is self-
clearing, meaning that writing a “1” to any bit in the
register clears that status bit. In this way, the user should read the STATUS register, handle all
indicated event(s) and then write the register value back to STATUS to clear the handled events.
Writing “0” will not clear those bits if they have a value of “1”, which means that new events that
occurred since the last read of the STATUS register will not be accidentally cleared.
Figure 63:
STATUS Register
Addr: 0x93
STATUS
Bit
Bit Name
Default
Access
Bit Description
7
ASAT
0
R, SC
Spectral and Flicker Detect saturation.
If ASIEN is set, indicates Spectral saturation. Check
STATUS2 register to distinguish between analog or
digital saturation.
6:4
reserved
0
R
reserved
3
AINT
0
R, SC
Spectral Channel Interrupt.
If SP_IEN is set, indicates that a spectral event that
met the programmed thresholds and persistence
(APERS) occurred.
2
FINT
0
R, SC
FIFO Buffer Interrupt.
If FIEN is set, indicates that the FIFO_LVL fulfills the
threshold condition. If cleared by writing 1, the
interrupt will be asserted again as more data is
collected. To fully clear this interrupt, all data must
be read from the FIFO buffer.
1
C_INT
0
R, SC
Calibration Interrupt.
0
SINT
0
R, SC
System Interrupt.
If SIEN is set, indicates that system interrupt is set.
Refer to Status5 register.
STATUS 2 Register (Address 0xA3)
Figure 64:
STATUS 2 Register
Addr: 0xA3
STATUS 2
Bit
Bit Name
Default
Access
Bit Description
7
reserved
0
reserved
6
AVALID
0
R
Spectral Valid.
Indicates that the spectral measurement has been
completed
5
reserved
0
reserved



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