AS7341 datasheet(58/69 Pages) AMSOSRAM

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AS7341

Datasheet

• PUBLIC

DS000504

• v3-00 • 2020-Jun-25

│ 57

FIFO_CFG0 Register (Address 0xD7)

Figure 88:

FIFO_CFG0 Register

Addr: 0xD7

FIFO_CFG0

Bit

Bit Name

Default

Access

Bit Description

FIFO_WRITE_FD

R/W

FIFO write Flicker Detection

If set flicker raw data is written into FIFO (two bytes

per sample)

Note: This bit is ignored if flicker detection is

disabled. Refer to register 0xFC for FDEN=”0”.

6:0

reserved

0100001

Reserved, do not change

FIFO_LVL Register (Address 0xFD)

Figure 89:

FIFO_LVL Register

Addr: 0xFD

FIFO_LVL

Bit

Bit Name

Default

Access

Bit Description

7:0

FIFO_LVL

FIFO Buffer Level.

Indicates the number of entries (each are 2 bytes)

available in the FIFO buffer waiting for readout. The

FIFO RAM is 256byte, the FIFO_LVL range is from 0

entries to 128 entries.

FDATA Register (Address 0xFE and 0xFF)

Figure 90:

FDATA Register

Addr: 0xFE

FDATA

Bit

Bit Name

Default

Access

Bit Description

7:0

FDATA

FIFO Buffer Data

AS7341 数据表(PDF) 58 Page - ams-OSRAM AG

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