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RZ/G2LC 数据表(PDF) 35 Page - Renesas Technology Corp |
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RZ/G2LC 数据表(HTML) 35 Page - Renesas Technology Corp |
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35 / 74 page ![]() RZ/G2L Group, RZ/G2LC Group 3. Electrical Characteristics R01DS0484EJ0110 Rev.1.10 Page 35 of 74 May 30, 2025 3.5.4 CRU Access Timing Table 3.27 CRU AC Access Timing Item Symbol Min. Max. Unit Figures CAM_PCLK clock input cycle time tCCYC 13.4 74 ns Figure 3.11 CAM_PCLK clock input rise time tCR — 1 ns CAM_PCLK clock input low level pulse width tCLW 0.4 0.6 tCCYC CAM_PCLK clock input high level pulse width tCHW 0.4 0.6 tCCYC CAM_DATA0-15, CAM_HREF, CAM_VSYNC, CAM_FIELD setup time (P42_4 input) tCSU1 2 — ns CAM_FIELD setup time (P3_1 input) tCSU2 4 — ns CAM_DATA0-15, CAM_HREF, CAM_VSYNC, CAM_FIELD hold time tCHD 2 — ns CAM_PCLK CAM_DATA0 to 15 CAM_HREF CAM_VSYNC CAM_FIELD tCCYC tCLW tCHW tCR tCSU1 tCSU2 tCHD Figure 3.11 CRU AC Access Timing |
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