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RZ/G2LC 数据表(PDF) 57 Page - Renesas Technology Corp |
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RZ/G2LC 数据表(HTML) 57 Page - Renesas Technology Corp |
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57 / 74 page ![]() RZ/G2L Group, RZ/G2LC Group 3. Electrical Characteristics R01DS0484EJ0110 Rev.1.10 Page 57 of 74 May 30, 2025 3.5.16 Port Output Enable for GPT (POEG) Access Timing Table 3.43 POEG Timing Item Symbol Min. Max. Unit Figures POEG POEG input pulse width tPOEGW 3 — tp1cyc* 1 Figure 3.44 Note 1. tp1cyc indicates peripheral clock means POEG_x_CLKP (P0 ϕ) (x = A, B, C, D). POEG input trigger tPOEGW Figure 3.44 POEG Input Trigger Timing |
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