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ST7LITE3XF2 数据表(PDF) 64 Page - STMicroelectronics |
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ST7LITE3XF2 数据表(HTML) 64 Page - STMicroelectronics |
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64 / 173 page ![]() ST7LITE3xF2 64/173 DUAL 12-BIT AUTORELOAD TIMER 3 (Cont’d) ■ Long input capture Pulses that last between 8µs and 2s can be meas- ured with an accuracy of 4µs if fOSC = 8MHz in the following conditions: – The 12-bit AT3 Timer is clocked by the Lite Timer (RTC pulse: CK[1:0] = 01 in the ATCSR register) – The ICS bit in the ATCSR2 register is set so that the LTIC pin is used to trigger the AT3 Timer cap- ture. – The signal to be captured is connected to LTIC pin – Input Capture registers LTICR, ATICRH and ATICRL are read This configuration allows to cascade the Lite Timer and the 12-bit AT3 Timer to get a 20-bit input cap- ture value. Refer to Figure 44. Figure 44. Long Range Input Capture Block Diagram Notes: 1. Since the input capture flags (ICF) for both tim- ers (AT3 Timer and LT Timer) are set when signal transition occurs, software must mask one inter- rupt by clearing the corresponding ICIE bit before setting the ICS bit. 2. If the ICS bit changes (from 0 to 1 or from 1 to 0), a spurious transition might occur on the input capture signal because of different values on LTIC and ATIC. To avoid this situation, it is recommend- ed to do as follows: – First, reset both ICIE bits. – Then set the ICS bit. – Reset both ICF bits. – And then set the ICIE bit of desired interrupt. 3. How to compute a pulse length with long input capture feature. As both timers are used, computing a pulse length is not straight-forward. The procedure is as fol- lows: – At the first input capture on the rising edge of the pulse, we assume that values in the registers are as follows: LTICR = LT1 ATICRH = ATH1 ATICRL = ATL1 Hence ATICR1 [11:0] = ATH1 & ATL1 Refer to Figure 45 on page 65. LTIC ATIC ICS 1 0 12-bit Input Capture Register OFF fcpu fLTIMER 12-bit Upcounter1 12-bit AutoReload Register 8-bit Input Capture Register 8-bit Timebase Counter1 fOSC/32 LTICR CNTR1 ATICR ATR1 8 LSB bits 12 MSB bits LITE TIMER 12-Bit ARTIMER 20 cascaded bits 1 |
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