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ST7LITE3XF2 数据表(PDF) 119 Page - STMicroelectronics |
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ST7LITE3XF2 数据表(HTML) 119 Page - STMicroelectronics |
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119 / 173 page ![]() ST7LITE3xF2 119/173 LINSCI ™ SERIAL COMMUNICATION INTERFACE (LIN Mode) (cont’d) LIN HEADER LENGTH REGISTER (LHLR) Read Only Reset Value: 0000 0000 (00h). Note: In LIN Slave mode when LASE = 1 or LHDM = 1, the LHLR register is accessible at the address of the SCIERPR register. Otherwise this register is always read as 00h. Bits 7:0 = LHL[7:0] LIN Header Length. This is a read-only register, which is updated by hardware if one of the following conditions occurs: - After each break detection, it is loaded with “FFh”. - If a timeout occurs on THEADER, it is loaded with 00h. - After every successful LIN Header reception (at the same time than the setting of LHDF bit), it is loaded with a value (LHL) which gives access to the number of bit times of the LIN header length (THEADER). The coding of this value is explained below: LHL Coding: THEADER_MAX = 57 LHL(7:2) represents the mantissa of (57 - THEAD- ER) LHL(1:0) represents the fraction (57 - THEADER) Example of LHL coding: Example 1: LHL = 33h = 001100 11b LHL(7:3) = 1100b = 12d LHL(1:0) = 11b = 3d This leads to: Mantissa (57 - THEADER) = 12d Fraction (57 - THEADER) = 3/4 = 0.75 Therefore: (57 - THEADER) = 12.75d and THEADER = 44.25d Example 2: 57 - THEADER = 36.21d LHL(1:0) = rounded(4*0.21d) = 1d LHL(7:2) = Mantissa (36.21d) = 36d = 24h Therefore LHL(7:0) = 10010001 = 91h Example 3: 57 - THEADER = 36.90d LHL(1:0) = rounded(4*0.90d) = 4d The carry must be propagated to the matissa: LHL(7:2) = Mantissa (36.90d) + 1 = 37d = Therefore LHL(7:0) = 10110000 = A0h 70 LHL7 LHL6 LHL5 LHL4 LHL3 LHL2 LHL1 LHL0 LHL[7:2] Mantissa (57 - THEADER) Mantissa ( THEADER) 0h 0 57 1h 1 56 ... ... ... 39h 56 1 3Ah 57 0 3Bh 58 Never Occurs ... ... ... 3Eh 62 Never Occurs 3Fh 63 Initial value LHL[1:0] Fraction (57 - THEADER) 0h 0 1h 1/4 2h 1/2 3h 3/4 |
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