ST10R172LT6 datasheet(9/68 Pages) STMICROELECTRONICS

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ST10R172L - PIN DESCRIPTION

RSTIN

Reset Input with Schmitt-Trigger characteristics. Resets the

device when a low level is applied for a specified duration while

the oscillator is running. An internal pullup resistor enables

power-on reset using only a capacitor connected to

VSS. With

a bonding option, the RSTIN pin can also be pulled-down for

512 internal clock cycles for hardware, software or watchdog

timer triggered resets

RSTOUT

Internal Reset Indication Output. This pin is set to a low level

when the part is executes hardware-, software- or watchdog

timer reset. RSTOUT remains low until the EINIT (end of ini-

tialization) instruction is executed.

NMI

Non-Maskable Interrupt Input. A high to low transition at this

pin causes the CPU to vector to the NMI trap routine.

If it is not used, NMI should be pulled high externally.

P6.0-

P6.7

82-89

I/O

An 8-bit bidirectional I/O port. Port 6 is bit-wise programmable

for input or output via direction bits. For a pin configured as

input, the output driver is put into high-impedance state. Port 6

outputs can be configured as push/pull or open drain drivers.

The following Port 6 pins have alternate functions:

P6.0

CS0

Chip Select 0 Output

...

P6.4

CS4

Chip Select 4 Output

P6.5

HOLD

External Master Hold Request Input

(Master mode: O, Slave mode: I)

I/O

P6.6

HLDA

Hold Acknowledge Output

P6.7

BREQ

Bus Request Output

Table 1 Pin definitions

ST10R172LT6 数据表(PDF) 9 Page - STMicroelectronics

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