10/15

ST16-19RFRDCS

FSD_CHIPSET_B/0104VP2

Example: Inputs and ouputs of the FPGA

Figure 5 FPGA reading access chronogram

Example: you will find hereafter an example of the Analog front End Output. This is a BPSK signal:

Acquisition of the next bytes,

except the last one

Acquisition of the first byte

t6

t4

t3

Mic_Ctrl_Data

Mic_RW

Mic_Strb_b

Mic_Data(7:0)

Rx_fifo_empty

Rx_irq_eof

Tx_fifo_empty

Tx_start

t1

t2

t0

t5

Demodout

(BPSK Analog Front End Output)