L6591

Application information

23/32

Equation 6

Equation 7

While the line undervoltage is active the start-up generator keeps on working but there is no

PWM activity, thus the Vcc voltage continuously oscillates between the start-up and the

UVLO thresholds, as shown in the timing diagram of Figure 17.

The LINE pin, while the device is operating, is a high impedance input connected to high

value resistors, thus it is prone to pick up noise, which might alter the OFF threshold or give

origin to undesired switch-off of the IC during ESD tests. It is possible to bypass the pin to

ground with a small film capacitor (e.g. 1-10 nF) to prevent any malfunctioning of this kind. If

the function is not used the pin has to be connected to the VREF pin (#6) through a resistor

in the range of 10 to 100 k

Ω.

5.9

Soft-start and delayed latched shutdown upon overcurrent

At device start-up, a capacitor (Css) connected between the SS pin (#4) and ground is

clamped. During this ramp, the overcurrent setpoint progressively raises from zero the final

value (0.8 V). The time needed for the overcurrent setpoint to reach its steady state value,

referred to as soft-start time, is approximately:

Equation 8

During the ramp, the MOSFET duty cycle increases progressively, hence controlling the

start-up inrush current. Furthermore, all the functions that monitor the voltage on pin COMP

are disabled.

The soft-start pin is also invoked whenever the control voltage (COMP) saturates high,

which reveals an open-loop condition for the feedback system. This condition very often

occurs at start-up, but may be also caused by either a control loop failure or a converter

overload/short circuit.

L

H

OFF

L

6

H

ON

R

25

.

1

R

25

.

1

Vin

R

25

.

1

10

15

R

25

.

1

Vin

=

−

+

⋅

=

−

−

25

.

1

Vin

25

.

1

R

R

;

10

15

Vin

Vin

R

OFF

H

L

6

OFF

ON

H

−

=

⋅

−

=

−

1

SS

SS

SS

I

C

8

.

0

T

=