ST486DX - SMM POWER MANAGEMENT FEATURES

42

4.3

Suspend Mode

The SGS-Thomson CPU allows suspend mode to be entered either through software or hardware.

The software initiates suspend mode through execution of a HLT instruction if CCR2 bit 3 (HALT)

is set. After the HLT instruction is executed, the CPU enters suspend mode and asserts the suspend

acknowledge (SUSPA#) pin (if the SUSP bit in CCR2 was set to enable the SUSPA# pin).

Hardware initiates suspend mode by using two new pins on the CPU, SUSP# and SUSPA#. When

SUSP# is asserted, the CPU first completes any pending instructions and bus cycles, and then enters

suspend mode. Once in suspend mode, the SUSPA# pin is asserted by the CPU.