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ST486DX 数据表(PDF) 4 Page - STMicroelectronics |
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ST486DX 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 34 page ![]() Figure 1 - 1. Typical SMM Routine SMM Entry Save State Initialize SMM Environment Trap? Service Non-Trap SMI HALT? Decrement EIP Device OFF? Shadow Service Trap SMI Modify State For I/O Restart Restore State Resume I/O SMM Exit N Y Y Y N N or Emulate 1727400 ST486DX - SMM OVERVIEW 10 1.3 Typical SMM Routines A typical SMM routine is illustrated in the flowchart shown in Figure 1-1. Upon entry to SMM, the CPU registers that will be used by the SMM routine, must be saved. The SMM environment is initialized by setting up an Interrupt Descriptor Table, initializing segment limits and setting up a stack. If the SMI was a result of an I/O bus cycle, the SMM routine can monitor peripheral activ- ity, shadow read-only ports ,and/or emulate peripherals in software. If a peripheral was powered down, the SMM routine can power up a peripheral and reissue the I/O instruction. If the SMI was not caused by an I/O bus cycle, non-trap SMI functions can be serviced. If the instruction execut- ing, when an SMI occurred, was a HLT instruction, the HLT instruction it should be restarted when the SMM routine is complete. Before normal operation is resumed, any CPU registers modified during the SMM routine must be restored to their previous state. |
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