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ST72141K 数据表(PDF) 63 Page - STMicroelectronics

部件名 ST72141K
功能描述  8-BIT MCU WITH ELECTRIC-MOTOR CONTROL, ADC, 16-BIT TIMERS, SPI INTERFACE
PDF  132 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST72141K 数据表(HTML) 63 Page - STMicroelectronics

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MOTOR CONTROLLER (Cont’d)
Direct access to the phase register is also possible
when the DAC bit in the MCRA register is set.
Table 25. DAC and MOE Bit Meaning
The polarity register is used to match the polarity
of the power drivers keeping the same control log-
ic and software. If one of the OPx bits in the MPOL
register is set, this means the switch x is ON when
MCOx is VDD.
Each output status depends also on the momen-
tary state of the PWM, its group (odd or even), and
the peripheral state.
PWM Features
The outputs can be split in two PWM groups in or-
der to differentiate the high side and the low side
switches. This output property can be pro-
grammed using the OE[5:0] bits in the MPAR reg-
ister
Table 26. Meaning of the OE[5:0] Bits
The multiplexer directs the PWM to the upper
channel, the lower channel or both of them alter-
natively or simultaneously according to the periph-
eral state.
This means that the PWM can affect any of the up-
per or lower channels allowing the selection of the
most appropriate reference potential when free-
wheeling the motor in order to:
– Improve system efficiency
– Speed up the demagnetization phase
– Enable Back EMF zero crossing detection.
The OS[2:0] bits in the MCRB register allow the
PWM configuration to be configured for each case
as shown in Figure 41, Figure 42 and Figure 40.
This configuration depends also on the current/
voltage mode (V0C1 bit in the MCRA register) be-
cause the OS[2:0] have not the same meaning in
voltage mode and in current mode.
During demagnetization, the OS2 bit is used to
control PWM mode, and it is latched in a preload
register so it can be modified when a commutation
event occurs.
The OS[1:0] bits are used to control the PWM be-
tween the D and C events.
Warning: In Voltage Mode the OS[2:0] bits have a
special configuration value: OS[2:0] = 010.
In this mode, there is NO current limitation and NO
PWM applied to active outputs. The active outputs
are always at 100% whether in demagnetization,
or normal mode.
Note about demagnetization speed-up: during
demagnetization the voltage on the winding has to
be as high as possible in order to reduce the de-
magnetization time. Software can apply a different
PWM configuration on the outputs between the C
and D events, to force the free wheeling on the ap-
propriate diodes to maximize the demagnetization
voltage.
Emergency Feature
When the NMCES pin goes low
– The tristate output buffer is put in HiZ asynchro-
nously
– The MOE bit in the MCRA register is reset
– An interrupt request is sent to the CPU if the EIM
bit in the MIMR register is set
This bit can be connected to an alarm signal from
the drivers, thermal sensor or any other security
component.
This feature functions even if the MCU oscillator is
off.
MOE bit
DAC bit
Effect on
Output
Effect on MTIM
Timer
0
x
High Z
Clock disabled
10
Standard run-
ning mode
Standard run-
ning mode
11
MPHST value
same as MPOL
value
Clock disabled
OE[5:0]
Channel group
0
Even channel
1
Odd channel



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