ST72141K datasheet(38/132 Pages) STMICROELECTRONICS

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ST72141K

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7 MISCELLANEOUS REGISTER

The miscellaneous register allows control over

several different features such as the external in-

terrupts or the I/O alternate functions.

7.1 I/O Port Interrupt Sensitivity Description

The external interrupt sensitivity is controlled by

the ISxx bits of the Miscellaneous register. This

control allows to have two fully independent exter-

nal interrupt source sensitivities as shown in Fig-

ure 25.

Each external interrupt source can be generated

on four different events on the pin:

Falling edge

Rising edge

Falling and rising edge

Falling edge and low level

To guaranty correct functionality, a modification of

the sensitivity in the MISCR register must be done

only when the I bit of the CC register is set to 1 (in-

terrupt masked). See I/O port register and Miscel-

laneous register descriptions for more details on

the programming.

Figure 25. External Interrupt Sensitivity

7.2 I/O Port Alternate Functions

The MISCR register manages the SPI SS pin al-

ternate function configuration. This makes it possi-

ble to use the PB2 I/O port function while the SPI is

active.

These functions are described in detail in Section

7.4 Miscellaneous Register Description.

7.3 Clock Prescaler Selection

The MISCR register is used to select the SLOW

mode (see Section 5.4 SLOW Mode for more de-

tails) and the SPI and Motor Control peripheral

clock prescaler.

EI0

INTERRUPT

SOURCE

IS00

IS01

MISCR

SENSITIVITY

CONTROL

PA7

PA0

PB7

PB0

IS10

IS11

MISCR

SENSITIVITY

CONTROL

EI1

INTERRUPT

SOURCE

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