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ST72141K 数据表(PDF) 24 Page - STMicroelectronics |
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ST72141K 数据表(HTML) 24 Page - STMicroelectronics |
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24 / 132 page  ST72141K 24/132 3.4 MAIN CLOCK CONTROLLER (MCC) The MCC block supplies the clock for the ST7 CPU and its internal peripherals. It allows the SLOW power saving mode and the Motor Contral and SPI peripheral clocks to be managed inde- pendently. The MCC functionality is controlled by two bits of the MISCR register: SMS and XT16. The XT16 bit acts on the clock of the motor control and SPI peripherals while the SMS bit acts on the CPU and the other peripherals. Figure 17. Main Clock Controller (MCC) Block Diagram DIV 2 SMS - - CPU CLOCK MISCR TO CPU AND PERIPHERALS fOSC fCPU OSC2 OSC1 - - - - XT16 OSCILLATOR MCC DIV 16 4MHz MOTOR CONTROL PERIPHERAL DIV 2 4MHz SPI PERIPHERAL DIV 2 |
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