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ST72C254G2 数据表(PDF) 68 Page - STMicroelectronics |
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ST72C254G2 数据表(HTML) 68 Page - STMicroelectronics |
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68 / 135 page  ST72104G, ST72215G, ST72216G, ST72254G 68/135 SERIAL PERIPHERAL INTERFACE (Cont’d) 11.3.4.7 Single Master and Multimaster Configurations There are two types of SPI systems: – Single Master System – Multimaster System Single Master System A typical single master system may be configured, using an MCU as the master and four MCUs as slaves (see Figure 42). The master device selects the individual slave de- vices by using four pins of a parallel port to control the four SS pins of the slave devices. The SS pins are pulled high during reset since the master device ports will be forced to be inputs at that time, thus disabling the slave devices. Note: To prevent a bus conflict on the MISO line the master allows only one active slave device during a transmission. For more security, the slave device may respond to the master with the received data byte. Then the master will receive the previous byte back from the slave device if all MISO and MOSI pins are con- nected and the slave has not written its DR regis- ter. Other transmission security methods can use ports for handshake lines or data bytes with com- mand fields. Multi-master System A multi-master system may also be configured by the user. Transfer of master control could be im- plemented using a handshake method through the I/O ports or by an exchange of code messages through the serial peripheral interface system. The multi-master system is principally handled by the MSTR bit in the CR register and the MODF bit in the SR register. Figure 42. Single Master Configuration MISO MOSI MOSI MOSI MOSI MOSI MISO MISO MISO MISO SS SS SS SS SS SCK SCK SCK SCK SCK 5V Slave MCU Slave MCU Slave MCU Slave MCU Master MCU |
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